GC5016 Datasheet, PDF (42/88 Pages) Texas Instruments – WIDEBAND QUAD DIGITAL DOWN CONVERTER/ UP CONVERTER

GC5016
SLWS142G − JANUARY 2003 − REVISED NOVEMBER 2005
www.ti.com
The PFIR coefficients are programmed through the cmd5016 configuration software, based on the number of filter
taps computed per clock cycle, the number of clock cycles per output, the number of data streams in the PFIR
channel, the symmetry of the filter taps, and the number of filter taps. The mode_ab(cd), splitiq, cic_int, fir_int, fir_diff,
fir_nchan, and pfir_coef tap filename are the cmd5016 inputs.
CICsync
CKmaster
16x18-Bit
18
Tap Delay Ram
•••
Clock
Generator
16x18-Bit
Data In
Fck
18
Tap Delay Ram
•••
Control and
Address
Generator
42
Data
Out
18
18
16x16-Bit
Coef
RAM ¹⁶
34
•••
38
Control
Accumulator
PFIR Filter
Cell #1
PFIR Filter
Cell #16
Figure 20. Programmable Filter Block Diagram
Multiple PFIR coefficient sets will limit the PFIR length of a specific filter. In interpolation mode, the PFIR supports
symmetry for interpolation of 1 or 2. If the user’s filter is significantly shorter than the maximum filter supported, the
clock is stopped to the filter block, saving power. The user can append zeros after the PFIR taps, to use the longest
possible filter tap-size to reduce the PFIR latency.
Gain for the FIR is:
Gain = (sum (coefficients) / fir_int) x 2(fir_shift − 21).
The overall_gain pseudo-command is used to set the PFIR gain, as part of the channel gain calculation.
The DUC gain application note and the cmd5016 software usage note have specific applications of the PFIR and
gain settings for DUC usage.
14.5 Dual CIC Filter
The 18-bit output from the PFIR is interpolated by a factor of cic_int in the 5 or 6-stage CIC filter, where cic_int is
any integer between 1 and 4096. The 6-stage CIC has a usable range from 1 to 294. The 5-stage CIC has a usable
interpolation range from 1 to 1217. The value of cic_int is programmed independently for each channel. A block
diagram of the CIC filter is shown in Figure 21.
The output rate of the CIC interpolation filter is equal to the mixer clock rate CK. The CIC filter has a gain equal to
cic_int(numCICstages−1) that must be removed by the scale and round circuit. This circuit has a gain equal to
2−41+cic_shift, where cic_shift ranges from 0 to 39. Overall CIC gain is 2−41+cic_shift x cic_int(numCICstages−1)
and should normally be set to be 1 or less.
The cmd5016 configuration software uses ncic overall_gain and cic_int to calculate the appropriate control settings
for cic_shift, cic_xmt_5stg, cic_xmt_d6stg, cic_2x, and ncic. ncic is cic_int−1 for normal cases and cic_int/2−1 for
double rate.
42