GC5016 Datasheet, PDF (30/88 Pages) Texas Instruments – WIDEBAND QUAD DIGITAL DOWN CONVERTER/ UP CONVERTER

GC5016
SLWS142G − JANUARY 2003 − REVISED NOVEMBER 2005
13.12.1 Multichannel Time Division Multiplex
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Two or four channels can share one output port, with the data for each channel time multiplexed. In this case, the
frame strobe is set high with the MSB in the first I word in the frame as shown in Figure 15. The number of pins used
for a port is user programmable as 4, 8, or 16 , and the number of bits in a word is user programmable as 4, 8, 12,
16, or 20.
13.12.2 splitIQ Mode
Where a complex signal is split, so that the I and Q are processed in different channels, the outputs should be
configured to output real data, with the I portion output from one port and the Q from another. The splitIQ mode can
use the TDM IQ or real output mode.
13.12.3 Embedded AGC
The output formatter can be set up to output AGC information together with the data. This is appropriate for systems
with AGC enabled that need to know the current gain value with the 8 bit I and Q data. This is done by configuring
the round to 8 bits or less, while configuring the port to support 16 bits. The lower 8 bits of the I and Q word are then
replaced by the AGC information as shown in Table 2. The most significant 14 bits of gain are output together with
2 bits of state information. The state information shows whether the AGC is in a zero or max state that uses the faster
gain adaptive constants.
The embedded AGC only works for total decimation rates (cic_dec x fir_dec) of 5, 6, and 10 or more. The cmd5016
program issues a warning if this mode is enabled for total decimations of 1, 2, 3, 4, 7, 8, or 9.
Table 2. Bit Placement for Gain Output With Data
PINS
AO 15..8
AO 7..0
AO 15..8
AO 7..2
AO 1
AO 0
TIME
0
0
1
1
1
1
CONTENT
I 7..0
Gain 18..11
Q 7..0
Gain 10..5
Zero signal state
Saturated signal state
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