VS6724 Datasheet, PDF (95/118 Pages) STMicroelectronics – 2 Megapixel single-chip camera module

VS6724
Programming model and register description
Table 47. Output control (continued)
Index
OutputControl⁽¹⁾
bHSyncSetup
0x2390
Default value
Type
flag bits
0x0b
CODED
[0] HSyncSetup_sync_en
1-> enable hsync
0-> disable hsync
[1] HSyncSetup_sync_pol
1-> hsync active high
0-> hsync active low
[2] HSyncSetup_only_activelines
1-> hsync qualifies only active lines
0-> hsync qualifies active and non active lines, (PCLK will be on for
non active lines)
[3] HSyncSetup_track_henv
1-> automatic tracking hsync, ensures that the Hsync qualifies from
the first active pixel to last active pixel
0 -> programmable rise and fall of the hsync signal
0x2392
bVSyncSetup
Default value
Type
flag bits
0x07
CODED
[0] VSyncSetup_sync_en
1-> enable vsync
0-> disable vsync
[1] VSyncSetup_pol
1-> vsync active high
0-> vsync active low
[2] VSyncSetup_2_sel
1-> automatic tracking the vsync, so that it covers from the first
active line to last active line
0->manually set the rising and falling of the vsync signal
0x2395MSByte)
0x2396(LSByte)
bHsyncRisingH
Default value
Type
Purpose
0x00
BYTE
Operates only when bHSyncSetup bit [3] = 0
0x2399MSByte)
0x239a(LSByte)
bHsyncFallingH
Default value
Type
Purpose
0x00
BYTE
Operates only when bHSyncSetup bit [3] = 0
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