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VS6724 Datasheet, PDF (108/118 Pages) STMicroelectronics – 2 Megapixel single-chip camera module
Electrical characteristics
VS6724
6.6
I²C slave interface
VS6724 contains an I²C-type interface using two signals: a bidirectional serial data line
(SDA) and an input-only serial clock line (SCL). See PLL operation for detailed description
of protocol.
Table 60. Serial interface voltage levels(1)
Symbol
Parameter
Standard mode
Min.
Max.
Fast mode
Unit
Min.
Max.
Hysteresis of Schmitt Trigger Inputs
VHYS
VDD > 2 V N/A
VDD < 2V
N/A
VOL1
VOL3
LOW level output voltage (open drain)
at 3mA sink current
VDD > 2 V
0
VDD < 2V
N/A
VOH
HIGH level output voltage
N/A
tOF
Output fall time from VIHmin to VILmax with
a bus capacitance from 10 pF to 400 pF
-
tSP
Pulse width of spikes which must be
suppressed by the input filter
N/A
N/A
0.05 VDD
-
V
N/A
0.1 VDD
-
V
0.4
0
0.4
V
N/A
0
0.2 VDD
V
N/A
0.8 VDD
V
250
20+0.1Cb(2)
250
ns
N/A
0
50
ns
1. Maximum VIH = VDDmax + 0.5 V
2. Cb = capacitance of one bus line in pF
Figure 40. Voltage level specification
Input voltage levels
Output voltage levels
VIH = 0.7 * VDD
VOH = 0.8 * VDD
VIL = 0.3 * VDD
VOL = 0.2 * VDD
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