VS6724 Datasheet, PDF (34/118 Pages) STMicroelectronics – 2 Megapixel single-chip camera module

Functional description
VS6724
2.10.3
Table 4. ITU656 embedded synchronization code definition (odd frames)
Name
Description
4-byte sequence
SAV
EAV
SAV (blanking)
EAV (blanking)
Line start - active
Line end - active
Line start - blanking
Line end - blanking
FF 00 00 C7
FF 00 00 DA
FF 00 00 EC
FF 00 00 F1
Embedded synchronization EXT-CSI
The structure of a CSI image frame is shown Figure 19.
Figure 19. CSI 2 frame structure (VGA example)
FS
Line 1
LS
Frame of image data
LE
Line 480
FE
Frame blanking period
For CSI, the synchronization codes are as listed in Table 5.
Table 5. CSI - embedded synchronization code definition
Name
Description
4-byte sequence
LS
Line start
FF 00 00 00
LE
Line end
FF 00 00 01
FS
Frame Start
FF 00 00 02
FE
Frame End
FF 00 00 03
34/118