VS6724 Datasheet, PDF (109/118 Pages) STMicroelectronics – 2 Megapixel single-chip camera module

VS6724
Electrical characteristics
Table 61. Timing specification⁽¹⁾
Symbol
Parameter
Standard mode
Min.
Max.
Fast mode
Unit
Min.
Max.
f_SCL
t_HD;STA
t_LOW
t_HIGH
t_SU;STA
t_HD;DAT
t_SU;DAT
t_r
t_f
t_SU;STO
t_BUF
SCL clock frequency
Hold time for a repeated start
LOW period of SCL
HIGH period of SCL
Set-up time for a repeated start
Data hold time (1)
Data Set-up time (1)
Rise time of SCL, SDA
Fall time of SCL, SDA
Set-up time for a stop
Bus free time between a stop and a
start
0
100
0
400
kHz
4.0
-
0.6
-
μs
4.7
-
1.3
-
μs
4.0
-
0.6
-
μs
4.7
-
0.6
-
μs
300
-
300
-
ns
250
-
100
-
ns
-
1000 20+0.1C_b(2)
300
ns
-
300
20+0.1C_b(2)
300
ns
4.0
-
0.6
-
μs
4.7
-
1.3
-
μs
C_b
Capacitive Load for each bus line
-
400
-
400
pF
V_nL
Noise Margin at the LOW level for each
connected device (including hysteresis)
0.1 V_DD
-
0.1 V_DD
-
V
V_nH
Noise Margin at the HIGH level for each
connected device (including hysteresis)
0.2 V_DD
-
0.2 V_DD
-
V
1. All values are referred to a V_IHmin = 0.9 V_DD and V_ILmax = 0.1 V_DD
2. C_b = capacitance of one bus line in pF
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