VS6724 Datasheet, PDF (32/118 Pages) STMicroelectronics – 2 Megapixel single-chip camera module

Functional description
VS6724
2.9.6
Note:
Bayer 8-bit
The ITU protocol allows the encapsulation of various data formats over the link. The
following data formats are also proposed encapsulated in ITU601-656 protocol:
● Truncated from 10-bit
The output is shown in Figure 17. In this output mode a single byte is output data per pixel,
therefore the output PCLK and data rate is half that of the 10bit modes.
It is possible to reverse the overall bit order of the individual Bayer pixels through a register
programming.
False synchronization codes are avoided in the LSByte by adding or subtracting a value of
one, dependent on detection of a 0 code or 255 code respectively.
Figure 17. Bayer 8 output
START OF DIGITAL ACTIVE LINE
EAV Code
F 0 0 _{X D DDDD} DDDD DDD
F00Y _{0 1230 1230 123}
8-bit Bayer
F
F
0
0
0
0
X
Y
L L L LL L L L
S S S SS S S S
B₀ B₁ B₂ B₃ B₄ B₅ B₆ B₇
L LL L
S SS S
B₈ B₉ B₁₀B₁₁
where: LSB_n = Bayer_n[7:0]
2.10
2.10.1
Data synchronization methods
External capture systems can synchronize with the data output from VS6724 in one of two
ways:
1. Synchronization codes are embedded in the output data
2. Via the use of two additional synchronization signals: VSYNC and HSYNC
Both methods of synchronization can be programmed to meet the needs of the host system.
Embedded codes
The embedded code sequence can be inserted into the output data stream to enable the
external host system to synchronize with the output frames. The code consists of a 4-byte
sequence starting with 0xFF, 0x00, 0x00. The final byte in the sequence depends on the
mode selected.
Two types of embedded codes are supported by the VS6724: Mode 1 (ITU656) and Mode 2.
The bSyncCodeSetup register is used to select whether codes are inserted or not and to
select the type of code to insert.
When embedded codes are selected each line of data output contains 8 additional clocks: 4
before the active video data and 4 after it.
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