VS6724 Datasheet, PDF (107/118 Pages) STMicroelectronics – 2 Megapixel single-chip camera module

VS6724
Electrical characteristics
6.4
External clock
The VS6724 requires an external clock. This clock is a CMOS digital input. The clock input
is fail-safe in power down mode.
Table 59. External clock
CLK
Min.
Range
Typ.
Unit
Max.
DC coupled square wave
Clock frequency⁽¹⁾
VDD
6.50
V
27
MHz
1. The uwExternalClockFrequencyDenumerator and bExternalClockFrequencyDenominator registers
must be configured to match the frequency supplied on the CLK pin.
6.5
Chip enable
CE is a CMOS digital input. The module is powered down when a logic 0 is applied to CE.
See Section Figure 11.: Power up sequence for further information.
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