UPSD3212C Datasheet, PDF (17/152 Pages) STMicroelectronics – Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM

UPSD3212C, UPSD3212CV
ARCHITECTURE OVERVIEW
Memory Organization
The uPSD321X Devices’s standard 8032 Core
has separate 64KB address spaces for Program
memory and Data Memory. Program memory is
where the 8032 executes instructions from. Data
memory is used to hold data variables. Flash
memory can be mapped in either program or data
space. The Flash memory consists of two flash
memory blocks: the main Flash (512Kbit) and the
Secondary Flash (128Kbit). Except during flash
memory programming or update, Flash memory
can only be read, not written to. A Page Register
is used to access memory beyond the 64K bytes
address space. Refer to the PSD Module for de-
tails on mapping of the Flash memory.
The 8032 core has two types of data memory (in-
ternal and external) that can be read and written.
The internal SRAM consists of 256 bytes, and in-
cludes the stack area.
The SFR (Special Function Registers) occupies
the upper 128 bytes of the internal SRAM, the reg-
isters can be accessed by Direct addressing only.
Another 2K bytes resides in the PSD Module that
can be mapped to any address space defined by
the user.
Figure 5. Memory Map and Address Space
MAIN
FLASH
EXT. RAM
SECONDARY
FLASH
64KB
16KB
Flash Memory Space
INT. RAM
FF
Indirect
Addressing
SFR
Direct
Addressing
7F
Indirect
or
Direct
Addressing
0
Internal RAM Space
(256 Bytes)
2KB
External RAM Space
(MOVX)
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