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UPSD3212C Datasheet, PDF (16/152 Pages) STMicroelectronics – Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM | |||
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UPSD3212C, UPSD3212CV
Port Pin
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PD1
Signal
Name
TMS
TCK
VSTBY
TSTAT
TERR
TDI
TDO
Pin No. In/Out
Basic
20
I JTAG pin
16
I JTAG pin
15
I/O General I/O port pin
14
I/O General I/O port pin
9
I/O General I/O port pin
7
I
JTAG pin
6
O JTAG pin
5
I/O General I/O port pin
CLKIN
3
I/O General I/O port pin
PD2
Vcc
Vcc
GND
GND
GND
NC
NC
NC
NC
CSI
1
I/O General I/O port pin
12
50
13
29
69
10
11
17
71
Function
Alternate
1. PLD Macro-cell outputs
2. PLD inputs
3. SRAM stand by voltage input
(VSTBY)
4. SRAM battery-on indicator
(PC4)
5. JTAG pins are dedicated pins
1. PLD I/O
2. Clock input to PLD and APD
1. PLD I/O
2. Chip select to PSD Module
52 PIN PACKAGE I/O PORT
The 52-pin package members of the uPSD321X
Devices have the same port pins as those of the
80-pin package except:
s Port 0 (P0.0-P0.7, external address/data bus
AD0-AD7)
s Port 2 (P2.0-P2.3, external address bus A8-
A11)
s Port A (PA0-PA7)
s Port D (PD2)
s Bus control signal (RD,WR,PSEN,ALE)
Pin 5 requires a pull-up resistor (2k⦠for 3V de-
vices, 7.5k⦠for 5V devices) for all devices.
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