S70GL01GN00 Datasheet, PDF (70/83 Pages) SPANSION – 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology

Test Conditions
Advance Information
Device
Under
Test
3.3 V
2.7 kΩ
C_L
6.2 kΩ
Figure 9. Test Setup
Table 13. Test Specifications
Test Condition
All Speeds
Output Load
1 TTL gate
Output Load Capacitance, C_L
(including jig capacitance)
30
Input Rise and Fall Times
5
Input Pulse Levels
Input timing measurement
reference levels (See Note)
0.0–V_IO
0.5V_IO
Output timing measurement
reference levels
0.5 V_IO
Unit
pF
ns
V
V
V
1. If V_IO < V_CC, the reference level is 0.5 V_IO.
2. Diodes are IN3064 or equivalent
Key to Switching Waveforms
Waveform
Inputs
Steady
Outputs
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
V_IO
0.0 V
Input
0.5 V_IO
Measurement Level
0.5 V_IO V Output
Note: If V_IO < V_CC, the input measurement reference level is 0.5 V_IO.
Figure 10. Input Waveforms and Measurement Levels
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S70GL01GN00 MirrorBit^TM Flash
S70GL01GN00_00_A1 June 1, 2005