S70GL01GN00 Datasheet, PDF (38/83 Pages) SPANSION – 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology

Advance Information
Factory Locked: Secured Silicon Sector Programmed and
Protected At the Factory
In devices with an ESN, the Secured Silicon Sector is protected when the device
is shipped from the factory. The Secured Silicon Sector cannot be modified in any
way. An ESN Factory Locked device has an 16-byte random ESN at addresses
000000h–000007h. Please contact your sales representative for details on order-
ing ESN Factory Locked devices.
Customers may opt to have their code programmed by the factory through the
ExpressFlash service (Express Flash Factory Locked). The devices are then
shipped from the factory with the Secured Silicon Sector permanently locked.
Contact your sales representative for details on using the ExpressFlash service.
Write Protect (WP#)
The Write Protect function provides a hardware method of protecting the first or
last sector group without using V_ID. Write Protect is one of two functions provided
by the WP#/ACC input.
If the system asserts V_IL on the WP#/ACC pin, the device disables program and
erase functions in the first or last sector group independently of whether those
sector groups were protected or unprotected using the method described
in Advanced Sector Protection‚ on page 29. Note that if WP#/ACC is at V_IL when
the device is in the standby mode, the maximum input load current is increased.
See the table in DC Characteristics‚ on page 67.
If the system asserts V_IH on the WP#/ACC pin, the device reverts to
whether the first or last sector was previously set to be protected or un-
protected using the method described in Sector Group Protection and
Unprotection. Note that WP# contains an internal pullup; when uncon-
nected, WP# is at V_IH.
Hardware Data Protection
The command sequence requirement of unlock cycles for programming or erasing
provides data protection against inadvertent writes (refer to Table 10 on page 54
and Table 11 on page 57 for command definitions). In addition, the following
hardware data protection measures prevent accidental erasure or programming,
which might otherwise be caused by spurious system level signals during V_CC
power-up and power-down transitions, or from system noise.
Low V_CC Write Inhibit
When V_CC is less than V_LKO, the device does not accept any write cycles. This pro-
tects data during V_CC power-up and power-down. The command register and all
internal program/erase circuits are disabled, and the device resets to the read
mode. Subsequent writes are ignored until V_CC is greater than V_LKO. The system
must provide the proper signals to the control pins to prevent unintentional writes
when V_CC is greater than V_LKO.
Write Pulse Glitch Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#, CE2#, or WE# do not ini-
tiate a write cycle.
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S70GL01GN00 MirrorBit^TM Flash
S70GL01GN00_00_A1 June 1, 2005