S70GL01GN00 Datasheet, PDF (69/83 Pages) SPANSION – 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit™ Process Technology

Advance Information
DC Characteristics
CMOS Compatible for Each S29GL512N
Parameter
Symbol
Parameter Description
(Notes)
Test Conditions
Min
Typ
Max
I_LI
Input Load Current (Note 1)
V_IN = V_SS to V_CC,
V_CC = V_{CC max}
WP/ACC: ±2.0
Others: ±1.0
I_LIT
A9 Input Load Current
I_LO
Output Leakage Current
V_CC = V_{CC max}; A9 = 12.5 V
V_OUT = V_SS to V_CC,
V_CC = V_{CC max}
CE# = V_IL, OE# = V_IH, V_CC = V_CCmax,
f = 1 MHz, Byte Mode
35
±1.0
6
20
I_CC1
V_CC Active Read Current (Note 1, and
Note 7)
CE# = V_IL, OE# = V_IH, V_CC = V_CCmax,
f = 5 MHz, Word Mode
30
50
CE# = V_IL, OE# = V_IH, V_CC = V_CCmax,
f = 10 MHz
60
90
I_CC2
V_CC Intra-Page Read Current (Note 1,
and Note 7)
CE# = V_IL, OE# = V_IH, V_CC = V_CCmax
f = 10 MHz
CE# = V_IL, OE# = V_IH, V_CC = V_CCmax,
f=33 MHz
1
10
5
20
I_CC3
V_CC Active Erase/Program Current (Note
2, Note 3, Note 7)
CE# = V_IL, OE# = V_IH, V_CC = V_CCmax
50
90
I_CC4
I_CC5
I_CC6
I_ACC
V_IL
V_IH
V_HH
CE#, RESET# = V_SS ± 0.3 V, OE# =
V_CC Standby Current (Note 7)
V_IH, V_CC = V_CCmax V_IL = V_SS + 0.3 V/-
0.1V
1
V_IO = V_CC
V_CC = V_CCmax;
V_CC Reset Current
V_IL = V_SS + 0.3 V/-0.1V,
RESET# = V_SS ± 0.3 V
1
V_IO = V_CC
V_CC = V_CCmax
V_IH = V_CC ± 0.3 V,
Automatic Sleep Mode (Note 4)
V_IL = V_SS + 0.3 V/-0.1V,
1
WP#/A_CC = V_IH
V_IO = V_CC
WP#/ACC
ACC Accelerated Program Current (Note CE# = V_IL, OE# = V_IH, V_CC = V_CCmax,
pin
10
7)
WP#/ACC = V_IH
V_CC pin
50
Input Low Voltage (Note 5)
–0.1
Input High Voltage (Note 5)
Voltage for ACC Erase/Program
Acceleration
V_CC = 2.7 –3.6 V
0.7 x V_IO
11.5
5
5
5
20
90
0.3 x V_IO
V_IO + 0.3
12.5
V_ID
Voltage for Autoselect and Temporary
Sector Unprotect
V_CC = 2.7 –3.6 V
11.5
12.5
V_OL
Output Low Voltage (Note 5)
I_OL = 100 µA
0.15 x V_IO
V_OH
Output High Voltage (Note 5)
I_OH = -100 µA
0.85 x V_IO
V_LKO
Low V_CC Lock-Out Voltage (Note 3)
2.3
2.5
Notes:
1. The I_CC current listed is typically less than 2 mA/MHz, with OE# at V_IH.
2. I_CC active while Embedded Erase or Embedded Program or Write Buffer Programming is in progress.
3. Not 100% tested.
4. Automatic sleep mode enables the lower power mode when addresses remain stable tor t_ACC + 30 ns.
5. V_IO = 2.7–3.6 V.
6. V_CC = 3 V.
7. CE# can be replaced with CE2# when referring to the second die in the package.
Unit
µA
µA
µA
mA
mA
mA
µA
µA
µA
mA
V
V
V
V
V
V
V
June 1, 2005 S70GL01GN00_00_A1
S70GL01GN00 MirrorBit^TM Flash
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