SP37E760 Datasheet, PDF (54/78 Pages) SMSC Corporation – 3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS

Reserved. Note: all test modes are reserved for SMSC use. Activating test mode registers may produce undesired
results.
BIT NO.
0
1
2
3
4
5
6
7
Table 38 - CR11
BIT NAME
DESCRIPTION
Test 16
Test 17
Test 18
Test 19
RESERVED FOR SMSC USE
Test 20
Test 21
Test 22
Test 23
7.3.19 CR12 - CR13
CR12 - CR13 are reserved and Read Only. The default value of these registers after power up is 00H.
7.3.20 CR14
(Reserved).
7.3.21 CR15
CR15 can only be accessed in the configuration state and after the CSR has been initialized to 15H. CR15 shadows
the bits in the write-only UART1 run-time FCR register (Table 39).
Table 39 - CR15: UART1 FCR Shadow Register
D7
D6
D5 D4
D3
D2
D1
D0
Defaul
t
CR R RCVR
RCVR Reserved DMA XMIT RCVR FIFO
N/A
15
TRIGGER TRIGGE
MODE FIFO FIFO ENABL
MSB
R LSB
SELECT RESE RESE
E
T
T
7.3.22 CR16
CR161 can only be accessed in the configuration state and after the CSR has been initialized to 16H. CR16 shadows
the bits in the write-only UART2 run-time FCR register (Table 40).
D7
RCVR
CR16 R TRIGGE
R MSB
Table 40 - CR16: UART2 FCR Shadow Register
D6
D D4
D3
D2
D1
5
RCVR
DMA XMIT RCVR
TRIGGER Reserved MODE FIFO FIFO
LSB
SELECT RESET RESET
D0
FIFO
ENABLE
Default
N/A
7.3.23 CR17
(Reserved). The default value of this register after power up is 003H.
7.3.24 CR18 - CR1D
CR18 - CR1D registers are Reserved and Read Only . The default value of these registers after power up is 00H.
SMSC DS – SP37E760
Page 54
Rev. 04/13/2001