SP37E760 Datasheet, PDF (3/78 Pages) SMSC Corporation – 3.3 V I/O CONTROLLER FOR EMBEDDED APPLICATIONS

TABLE OF CONTENTS
1 PIN CONFIGURATIONS ....................................................................................................................... 6
2 PIN DESCRIPTION ............................................................................................................................... 8
2.1
BUFFER TYPE PER PIN...................................................................................................................... 8
2.2
BUFFER TYPE SUMMARY ................................................................................................................. 12
2.3
OUTPUT DRIVERS ........................................................................................................................... 12
3 FUNCTIONAL DESCRIPTION............................................................................................................ 14
3.1
HOST PROCESSOR INTERFACE ........................................................................................................ 14
4 SERIAL PORT (UART) ....................................................................................................................... 15
4.1
REGISTER DESCRIPTION ................................................................................................................. 15
4.1.1
RECEIVE BUFFER REGISTER (RB) ................................................................................... 15
4.1.2
TRANSMIT BUFFER REGISTER (TB) ................................................................................. 15
4.1.3
INTERRUPT ENABLE REGISTER (IER).............................................................................. 15
4.1.4
INTERRUPT IDENTIFICATION REGISTER (IIR) ................................................................ 16
4.1.5
FIFO CONTROL REGISTER (FCR) ..................................................................................... 17
4.1.6
LINE CONTROL REGISTER (LCR)...................................................................................... 18
4.1.7
MODEM CONTROL REGISTER (MCR)............................................................................... 19
4.1.8
LINE STATUS REGISTER (LSR) ......................................................................................... 20
4.1.9
MODEM STATUS REGISTER (MSR) .................................................................................. 21
4.1.10 SCRATCHPAD REGISTER (SCR) ....................................................................................... 21
4.1.11 PROGRAMMABLE BAUD RATE GENERATOR DIVISOR LATCHES ................................ 21
4.1.12 The Affects of RESET on the UART Registers ..................................................................... 22
4.2
FIFO INTERRUPT MODE OPERATION................................................................................................ 23
4.3
FIFO POLLED MODE OPERATION .................................................................................................... 23
4.4
NOTES ON SERIAL PORT FIFO MODE OPERATION ........................................................................... 25
4.4.1
GENERAL ............................................................................................................................. 25
4.4.2
TX AND RX FIFO OPERATION............................................................................................ 25
5 PARALLEL PORT............................................................................................................................... 27
5.1
IBM XT/AT COMPATIBLE, BI-DIRECTIONAL AND EPP MODES .............................................. 28
5.1.1
DATA PORT .......................................................................................................................... 28
5.1.2
STATUS PORT ..................................................................................................................... 28
5.1.3
CONTROL PORT.................................................................................................................. 29
5.1.4
EPP ADDRESS PORT.......................................................................................................... 29
5.1.5
EPP DATA PORT 0............................................................................................................... 29
5.1.6
EPP DATA PORT 1............................................................................................................... 29
5.1.7
EPP DATA PORT 2............................................................................................................... 30
5.1.8
EPP DATA PORT 3............................................................................................................... 30
5.2
EPP 1.9 OPERATION................................................................................................................... 30
5.2.1
Software Constraints ............................................................................................................. 30
5.2.2
EPP 1.9 Write ........................................................................................................................ 30
5.2.3
EPP 1.9 Read........................................................................................................................ 31
5.3
EPP 1.7 OPERATION................................................................................................................... 31
5.3.1
Software Constraints ............................................................................................................. 31
5.3.2
EPP 1.7 Write ........................................................................................................................ 31
5.3.3
EPP 1.7 Read........................................................................................................................ 32
5.4
EXTENDED CAPABILITIES PARALLEL PORT ........................................................................... 33
5.4.1
Vocabulary ............................................................................................................................ 33
5.4.2
ISA IMPLEMENTATION STANDARD................................................................................... 34
5.4.3
Description ............................................................................................................................ 34
5.4.4
Register Definitions ............................................................................................................... 35
5.4.5
OPERATION ......................................................................................................................... 39
SMSC DS – SP37E760
Page 3
Rev. 04/13/2001