C541U_99 Datasheet, PDF (85/192 Pages) Siemens Semiconductor Group – 8-BIT CMOS MICROCONTROLLER

On-Chip Peripheral Components
C541U
The standard USB read access as shown in figure 6-23 supports random and sequential CPU
access mode of the USB memory. The memory buffer full condition is true when a predefined
number of bytes (MaxLen) has been written by the CPU or when bit DONE has been set by
software.
After SOF(n) occured at 1 with a full USB memory buffer, the USB reads the buffer. Bit SOD is set
at the end of the USB buffer read operation at 2 , indicating an empty USB memory buffer. Now,
the CPU can write again data into the USB memory buffer until a determined number (MaxLen) of
bytes are transfered or until bit DONE has been set by software. The MaxLen value must be
previously set by software. When the actual USB memory buffer address offset is equal to MaxLen,
bit EOD is set at 3 to indicate a full buffer. The USB memory buffer address offset is automatically
incremented with every CPU write access to USB memory buffer if bit INCE is set.
During the next frame (after SOF(n+1)) is set at 4 ) the USB memory buffer can be read by the
USB. Bit SOD is set again when the USB memory buffer becomes empty again. If bit DONE is set
by the CPU (at 5 ), the buffer is declared by the CPU to be full, even if the address offset does not
reach the value of MaxLen.
Number of
Data Bytes
in USB Buffer
MaxLen
2
SOD
set
1
SOF (n)
set
USB read accesses
Frame n
EOD
set
3
DONE
set
SOD
set
5
4
Frame n+1
SOF (n+1)
set
CPU write accesses
Time
SOF (n+2)
set
MCT03403
Figure 6-23
Single Buffer Mode : Standard USB Read Access
Semiconductor Group
6-40
1999-04-01