C541U_99 Datasheet, PDF (170/192 Pages) Siemens Semiconductor Group – 8-BIT CMOS MICROCONTROLLER

Power Saving Modes
C541U
9.2.2 Exit from Power Down Mode
If the power down mode is exit via a hardware reset, the microcontroller with its SFRs is put into the
hardware reset state and the content of RAM and XRAM are not changed. The reset signal that
terminates the power down mode also restarts the RC oscillator and the on-chip oscillatror. The
reset operation should not be activated before V_DD is restored to its normal operating level and
must be held active long enough to allow the oscillator to restart and stabilize (similar to power-on
reset). The USB clock system must be cotrolled as described for the hardware reset in chapter 5.
Figure 9-1 shows the procedure which must is executed when the power down mode is left via the
wake-up capability.
P3.2 / INT0
or
Activity Detected
on USB Bus
Power Down
Mode
1)
Latch
Phase
2)
min.
10 µs
Detailed Timing of Beginning of Phase 4
ALE
Watchdog Circuit
Oscillator Start-Up Phase
3)
Execution of
Interrupt at
007B _H
4) 5)
typ. 5 ms
RETI
Instruction
PSEN
P2
Invalid Address
00H
P0
Invalid Address / Data
7BH
1st Instr. of ISR
MCT03418
Figure 9-1
Wake-up from Power Down Mode Procedure
Semiconductor Group
9-7
1997-10-01