C541U_99 Datasheet, PDF (81/192 Pages) Siemens Semiconductor Group – 8-BIT CMOS MICROCONTROLLER

On-Chip Peripheral Components
C541U
6.4.2 USB Memory Buffer Modes
6.4.2.1 Overview
Every endpoint of the USB module in the C541U can operate in two modes, dual buffer mode and
single buffer mode. Each mode provides random or sequential access to the USB memory. Figure
6-19 shows the possible buffer modes.
Buffer Modes
Dual Buffer Mode
Single Buffer Mode
Sequential
Access
Random
Access
Sequential
Access
Random
Access
MCD03399
Figure 6-19
Buffer Modes of the C541U USB Module
Single Buffer Mode
In single buffer mode, the USB and the CPU use one common USB memory page. The active buffer
page is either page 0 or page 1.
Dual Buffer Mode
In dual buffer mode the USB and the CPU write into different USB memory pages allowing back-to-
back data transfers. Switching between the pages is done fully automatically, enabling a high data
transfer rate between CPU and USB module.
Random Access
Random access is available in single buffer mode and dual buffer mode. Random access allows to
change only a few bytes in a data block of the USB memory buffer. When the CPU has modified the
bytes in the data block, setting of bit DONE by software marks the buffer ready for transmission or
reception of data over the USB pipe. For modification of a specific byte in the buffer, the CPU must
write the address to SFR ADROFF and read/write the data byte from/to register USBVAL.
Sequential access
In sequential access mode the CPU accesses the data register USBVAL continuously without
setting the address of the next USB memory buffer location. This is done automatically if bit INCE
(increment enable) in the related SFR EPBCRn is set. After a specific number of CPU accesses (as
defined in SFR EPLENn), the buffer has been read/written by the CPU and is empty/full. Setting of
bit DONE by software, manually or automatically, marks the USB buffer ready.
Note : Only buffers for device to host pipes can be written.
Semiconductor Group
6-36
1999-04-01