C541U_99 Datasheet, PDF (43/192 Pages) Siemens Semiconductor Group – 8-BIT CMOS MICROCONTROLLER

Reset / System Clock
C541U
5.4 Oscillator and Clock Circuit
The oscillator and clock generation circuitry of the C541U is shown in figure 5-4. The crystal
oscillator generates the system clock for the microcontroller. The USB module can be provided with
the following clocks :
– Full speed operation : 48 MHz with a data rate of 12 Mbit/s
– Low speed operation : 6 MHz with a data rate of 1.5 Mbit/s
The low speed clock is generated by dividing the system clock by 2. The full speed clock is
generated by a PLL, which multiplies the system clock by a fix factor of 4. This PLL can be enabled
or disabled by bit PCLK of SFR DCR. Depending on full or low speed operation of the USB bit
SPEED of SFR has to be set or cleared for the selection of the USB clock. Bit UCLK is a general
enable bit for the USB clock.
XTAL1
Pin
12
MHz
Pin
XTAL2
Crystal ^{12 MHz}
Oscillator
System clock
of the
microcontroller
Divider
by 2
6 MHz
C541U
PLL
x4
48 MHz
Enable
PCLK
DCR.0
1
0
SPEED
DCR.7
UCLK
DCR.1
to USB
Module
Figure 5-4
Block Diagram of the Clock Generation Circuitry
In low speed mode the PLL is not required. Therefore, the PLL should be always disabled in low
speed mode. This also reduces the power consumption and the EMC of the C541U when used in
low speed mode.
Note: For correct function of the USB module the C541U must operate with 12 MHz external clock.
The microcontroller (except the USB module) is capable to operate down to 2 MHz
Semiconductor Group
5-6
1997-10-01