S128 Datasheet, PDF(68/107 Page) Renesas Technology Corp

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

S128 Datasheet, PDF (68/107 Pages) Renesas Technology Corp – Microcontroller

◁

S128

Note 1. tPcyc: PCLKB cycle.

Note 2. N is set as an integer from 1 to 8 by the SPCKD register.

Note 3. N is set as an integer from 1 to 8 by the SSLND register.

2. Electrical Characteristics

RSPCKA

master select

output

VOH

tSPCKWH

VIH

RSPCKA

slave select input

tSPCKWH

tSPCKr

VOH

VOL

tSPCKWL

VOH

tSPcyc

tSPCKf

VOH

VOL

tSPCKr

VIH

VIL

tSPCKWL

VIH

tSPcyc

tSPCKf

VIH

VIL

Figure 2.49 SPI clock timing

VOH = 0.7 Ã VCC, VOL = 0.3 Ã VCC, VIH = 0.7 Ã VCC, VIL = 0.3 Ã VCC

SSLA0 to

SSLA3

output

RSPCKA

CPOL = 0

output

RSPCKA

CPOL = 1

output

MISOA

input

MOSIA

output

tLEAD

tLAG

tTD

tSSLr, tSSLf

tSU

MSB IN

tDr, tDf

MSB OUT

DATA

tOH

DATA

LSB IN

tOD

LSB OUT

IDLE

MSB IN

MSB OUT

Figure 2.50 SPI timing (master, CPHA = 0) (bit rate: PCLKB division ratio is set to any value other than 1/2)

R01DS0309EU0100 Rev.1.00

Mar 10, 2017

Page 68 of 107

▷