S128 Datasheet, PDF (53/107 Pages) Renesas Technology Corp – Microcontroller

S128
2.3.3
Reset Timing
2. Electrical Characteristics
Table 2.22 Reset timing
Parameter
RES pulse width
Wait time after RES cancellation
(at power-on)
Wait time after RES cancellation
(during powered-on state)
Wait time after internal reset cancellation
(watchdog timer reset, SRAM parity error
reset, SRAM ECC error reset, bus master
MPU error reset, bus slave MPU error
reset, stack pointer error reset, software
reset)
At power-on
Not at power-on
LVD0 enabled*¹
LVD0 disabled*²
LVD0 enabled*¹
LVD0 disabled*²
LVD0 enabled*¹
LVD0 disabled*²
Symbol Min
t_RESWP
3
t_RESW
30
t_RESWT
-
-
t_RESWT2 -
-
t_RESWT3 -
-
Test
Typ
Max
Unit
conditions
-
-
ms
Figure 2.29
-
-
μs
Figure 2.30
0.7
-
ms
Figure 2.29
0.3
-
0.5
-
ms
Figure 2.30
0.05
-
0.6
-
ms
-
0.15
-
-
Note 1. When OFS1.LVDAS = 0.
Note 2. When OFS1.LVDAS = 1.
VCC
RES
Internal reset
t_RESWP
Figure 2.29 Reset input timing at power-on
t_RESWT
RES
Internal reset
Figure 2.30 Reset input timing
t_RESW
t_RESWT2
R01DS0309EU0100 Rev.1.00
Mar 10, 2017
Page 53 of 107