S128 Datasheet, PDF (59/107 Pages) Renesas Technology Corp – Microcontroller

S128
2. Electrical Characteristics
Input capture
Figure 2.37 GPT input capture timing
AGTIO, AGTEE
(input)
t_GTICW
t_ACKWL
t_ACYC
t_ACKWH
AGTIO, AGTO,
AGTOA, AGTOB
(output)
Figure 2.38 AGT I/O timing
t_ACYC2
ADTRG0
Figure 2.39 ADC14 trigger input timing
t_TRGW
KR00 to KR07
t_KR
Figure 2.40 Key interrupt input timing
2.3.7
PWM Delay Generation Circuit Timing
Table 2.31 PWM delay generation circuit timing
Conditions: VCC = AVCC0 = 2.7 to 5.5 V 32 MHz ≤ PCLKD ≤ 64 MHz
Parameter
Min Typ Max Unit Test conditions
Resolution
PCLKD = 64 MHz, DLL Mode = 5-bit mode -
488 -
ps
-
PCLKD = 64 MHz, DLL Mode = 4-bit mode -
976 -
ps
-
DNL*^1, *²
PCLKD = 32 MHz, DLL Mode = 5-bit mode -
-
976 -
5
-
ps
-
LSB -
R01DS0309EU0100 Rev.1.00
Mar 10, 2017
Page 59 of 107