S128 Datasheet, PDF (66/107 Pages) Renesas Technology Corp – Microcontroller

S128
2. Electrical Characteristics
V_IH
SDAn
V_IL
t_Sr
t_Sf
SCLn
P*¹
S*¹
(n = 0,1,9)
t_SDAH
Note 1. S, P, and Sr indicate the following:
S: Start condition
P: Stop condition
Sr: Restart condition
Figure 2.48 SCI simple IIC mode timing
2.3.10 SPI Timing
t_SP
Sr*¹
P*¹
t_SDAS
Test conditions:
V_IH = VCC × 0.7, V_IL = VCC × 0.3
V_OL = 0.6 V, I_OL = 6 mA
Table 2.36 SPI timing (1 of 2)
Conditions: Middle drive output is selected in the Port Drive Capability bit in the PmnPFS register.
Parameter
Symbol
Min
Max
SPI
RSPCK clock cycle Master
Slave
t_SPcyc
2
6
4096
4096
RSPCK clock high Master
pulse width
RSPCK clock low
pulse width
Slave
Master
Slave
t_SPCKWH
t_SPCKWL
(t_SPcyc –
-
t_SPCKR
– t_SPCKF) / 2
–3
3 × t_Pcyc
-
(t_SPcyc –
-
t_SPCKR
– t_SPCKF) / 2
–3
3 × t_Pcyc
-
RSPCK clock rise Output 2.7V or above t_SPCKr,
-
10
and fall time
2.4V or above ^tSPCKf
-
15
1.8V or above
-
20
1.6V or above
-
30
Input
-
1
Unit^*1
t_Pcyc
ns
Test conditions
Figure 2.49
C = 30_PF
ns
ns
µs
R01DS0309EU0100 Rev.1.00
Mar 10, 2017
Page 66 of 107