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M16C62_N Datasheet, PDF (342/621 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
Clock-Synchronous Serial I/O
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
_______ _______
• CTS/RTS functions disabled
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• CTS function only enabled
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• RTS function only enabled
_______ _______
• CTS/RTS separation function
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CTS/RTS pin is a programmable I/O port.
_______ _______
_______
CTS/RTS pin performs the CTS function.
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CTS/RTS pin performs the RTS function.
_______
_______
P60 pin works the RTS function, and P64 pin performs the CTS
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_______
function. When CTS/RTS separation function is selected, CTS/
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RTS function cannot select simultaneously.
(b) Function for choosing polarity
This function switches the polarity of the transfer clock. The following operations are available:
• Data is input at the falling edge of the transfer clock, and is output at the rising edge.
• Data is input at the rising edge of the transfer clock, and is output at the falling edge.
(c) Function for choosing which bit to transmit first
This function is to choose whether to transmit data from bit 0 or from bit 7. Choose either of the
following:
• LSB first Data is transmitted from bit 0.
• MSB first Data is transmitted from bit 7.
(d) Function for choosing successive reception mode
Successive reception mode is a mode in which reading the receive buffer register makes the recep-
tion-enabled status ready. In this mode, there is no need to write dummy data to the transmit buffer
register so as to make the reception-enabled status ready. But at the time of starting reception, read
the receive buffer register into a dummy manner.
• Normal mode
Writing dummy data to the transmit buffer register makes the
reception enabled status ready.
• Successive reception mode Reading the reception buffer register makes the reception-enabled
status ready.
(e) Function for outputting transfer clock to multiple pins
This function is to switch among pins to output the transfer clock. This function is effective only when
selecting the internal clock. Switching among pins for outputting the transfer clock allows data trans-
mission to two external ICs in a time-sharing manner.
(f) Data logic select function
This function is to reserve data when writing to transmit buffer register or reading from receive buffer register.
(g) Function for choosing a transmission interrupt factor
The timing to generate a transmission interrupt can be selected from the following: the instant the
transmission buffer is emptied or the instant the transmission register is emptied. When transmis-
sion buffer empty timing is selected, an interrupt occurs when transmitted data is moved from the
transmission buffer to the transmission register. Therefore, data can be transmitted in succession.
When transmission register empty timing is selected, an interrupt occurs when data transmission is
complete.
(h) TxD, RxD I/O polarity reverse function
This function is to reserve a polarity of TxD port output level and a polarity of RxD port input level.
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