M16C62_N Datasheet, PDF (215/621 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY

Timing (Vcc = 3V)
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
VCC = 3V
Timing requirements (referenced to VCC = 3V, VSS = 0V at Ta = 25^oC unless otherwise specified)
Table 1.26.25. External clock input
Symbol
Parameter
Standard
Min. Max. ^Unit
tc
External clock input
EPROM, One-time PROM
143
ns
cycle time
Mask ROM, Flash memory (5V version)
100
ns
tw(H)
External clock input
EPROM, One-time PROM
60
ns
HIGH pulse width
Mask ROM, Flash memory (5V version)
40
ns
tw(L)
External clock input
EPROM, One-time PROM
60
ns
LOW pulse width
Mask ROM, Flash memory (5V version)
40
ns
tr
External clock rise time
18
ns
tf
External clock fall time
18
ns
Table 1.26.26. Memory expansion and microprocessor modes
Symbol
Parameter
tac1(RD-DB)
Data input access time (no wait)
tac2(RD-DB) Data input access time (with wait)
tac3(RD-DB) _{Data input access time (when accessing multiplex bus area)}
tsu(DB-RD)
Data input setup time
tsu(RDY-BCLK ) _{RDY input setup time}
tsu(HOLD-BCLK ) _{HOLD input setup time}
th(RD-DB)
Data input hold time
th(BCLK -RDY) _{RDY input hold time}
th(BCLK-HOLD ) _{HOLD input hold time}
td(BCLK-HLDA) _{HLDA output delay time}
Note: Calculated according to the BCLK frequency as follows:
tac1(RD – DB) =
10 ⁹
– 90
f(BCLK) X 2
[ns]
tac2(RD – DB) =
3 X 10 ⁹
– 90
f(BCLK) X 2
[ns]
tac3(RD – DB) =
3 X 10 ⁹
– 90
f(BCLK) X 2
[ns]
Standard
Min. Max.
(Note)
(Note)
(Note)
80
60
80
0
0
0
100
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
200