M16C62_N Datasheet, PDF (151/621 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY

Clock asynchronous serial I/O (UART) mode
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(c) Function for switching serial data logic (UART2)
When the data logic select bit (bit 6 of address 037D16) is assigned 1, data is inverted in writing to the
transmission buffer register or reading the reception buffer register. Figure 1.19.20 shows the ex-
ample of timing for switching serial data logic.
• When LSB first, parity enabled, one stop bit
Transfer clock ^{“H”}
“L”
TxD2 ^{“H”}
(no reverse) _{“L”}
TxD2 “H”
(reverse) _{“L”}
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST D0 D1 D2 D3 D4 D5 D6 D7 P SP
ST : Start bit
P : Even parity
SP : Stop bit
Figure 1.19.20. Timing for switching serial data logic
(d) TxD, RxD I/O polarity reverse function (UART2)
This function is to reverse TXD pin output and RXD pin input. The level of any data to be input or output
(including the start bit, stop bit(s), and parity bit) is reversed. Set this function to “0” (not to reverse) for
usual use.
(e) Bus collision detection function (UART2)
This function is to sample the output level of the TXD pin and the input level of the RXD pin at the rising
edge of the transfer clock; if their values are different, then an interrupt request occurs. Figure 1.19.21
shows the example of detection timing of a buss collision (in UART mode).
Transfer clock ^{“H”}
“L”
TxD2 ^{“H”}
ST
“L”
RxD2 ^{“H”}
ST
“L”
Bus collision detection _{“1”}
interrupt request signal _{“0”}
Bus collision detection _{“1”}
interrupt request bit _{“0”}
Figure 1.19.21. Detection timing of a bus collision (in UART mode)
SP
SP
ST : Start bit
SP : Stop bit
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