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M16C62_N Datasheet, PDF (117/621 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
Timers’ functions for three-phase motor control
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Three-phase output buffer register 0 (Note)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IDB0
Address
034A16
When reset
0016
Bit Symbol
DU0
Bit name
U phase output buffer 0
Function
Setting in U phase output buffer 0
RW
DUB0 U phase output buffer 0 Setting in U phase output buffer 0
DV0
V phase output buffer 0 Setting in V phase output buffer 0
DVB0 V phase output buffer 0 Setting in V phase output buffer 0
DW0
W phase output buffer 0 Setting in W phase output buffer 0
DWB0 W phase output buffer 0 Setting in W phase output buffer 0
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.
Note: When executing read instruction of this register, the contents of three-phase shift
register is read out.
Three-phase output buffer register 1 (Note)
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
IDB1
Address
034B16
When reset
0016
Bit Symbol
DU1
Bit name
Function
U phase output buffer 1 Setting in U phase output buffer 1
RW
DUB1
U phase output buffer 1 Setting in U phase output buffer 1
DV1
V phase output buffer 1 Setting in V phase output buffer 1
DVB1
V phase output buffer 1 Setting in V phase output buffer 1
DW1
W phase output buffer 1 Setting in W phase output buffer 1
DWB1 W phase output buffer 1 Setting in W phase output buffer 1
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0”.
Note: When executing read instruction of this register, the contents of three-phase shift
register is read out.
Dead time timer
b7
b0
Symbol
DTT
Address
034C16
When reset
Indeterminate
Function
Set dead time timer
Values that can be set R W
1 to 255
Timer B2 interrupt occurrences frequency set counter
b3
b0
Symbol
Address
When reset
ICTB2
034D16
Indeterminate
Function
Set occurrence frequency of timer B2
interrupt request
Values that can be set R W
1 to 15
Note1: In setting 1 to bit 1 (INV01) - the effective interrupt output specification bit - of three-
phase PWM control register 0, do not change the B2 interrupt occurrences frequency
set counter to deal with the timer function for three-phase motor control.
Note2: Do not write at the timing of an overflow occurrence in timer B2.
Figure 1.18.2. Registers related to timers for three-phase motor control
102