M16C62_N Datasheet, PDF (194/621 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY

Usage precaution
Mitsubishi microcomputers
M16C / 62 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(4) External interrupt
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• When the polarity of the INT0 to INT5 pins is changed, the interrupt request bit is sometimes set
to "1". After changing the polarity, set the interrupt request bit to "0".
(5) Rewrite the interrupt control register
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt
request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt
control register after the interrupt is disabled. The program examples are described as follow:
Example 1:
INT_SWITCH1:
FCLR I
AND.B #00h, 0055h
NOP
NOP
FSET I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Four NOP instructions are required when using HOLD function.
; Enable interrupts.
Example 2:
INT_SWITCH2:
FCLR I
AND.B #00h, 0055h
MOV.W MEM, R0
FSET I
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Dummy read.
; Enable interrupts.
Example 3:
INT_SWITCH3:
PUSHC FLG
FCLR I
AND.B #00h, 0055h
POPC FLG
; Push Flag register onto stack
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Enable interrupts.
The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted
before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the
interrupt control register is rewritten due to effects of the instruction queue.
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled,
the interrupt request bit is not set sometimes even if the interrupt request for that register has
been generated. This will depend on the instruction. If this creates problems, use the below in-
structions to change the register.
Instructions : AND, OR, BCLR, BSET
Noise
(1) VPP line of one-time PROM version or EPROM version
• VPP (This line is for PROM programming power line) line of internal PROM connected to CNVSS
with one-time PROM version or EPROM version. So CNVSS should be a short line for improve-
ment of noise resistance. If CNVSS line is long, you should insert an approximately 5K ohm
resistor close to CNVSS pin and connect to VSS or VCC.
Note 1: Inserting a 5 K ohm resistor will not cause any problem when switching to mask ROM version.
(2) Insert bypass capacitor between VCC and VSS pin for noise and latch up countermeasure.
• Insert bypass capacitor (about 0.1 µF) and connect short and wide line between VCC and VSS
lines.
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