HYB18L256160B Datasheet, PDF (8/58 Pages) Qimonda AG – DRAMs for Mobile Applications 256-Mbit Mobile-RAM

Data Sheet
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
2.1
Power On and Initialization
The Mobile-RAM must be powered up and initialized in a predefined manner (see Figure 3). Operational procedures other than
those specified may result in undefined operation.
9'' 
9' ' 4 
&/ .
&. ( 
FIGURE 3
Power-Up Sequence and Mode Register Sets
 —V
W_{&. }
W_{53 }
W_{5) & }
W₅ _{)& }
W_{05' }
W_{05 '}
&RP PD QG
$GGUH VV
$
%$ %$ 
'40 
'4 
+ /HYHO
+LJ K=
12 3 
35( 
$5) 
$OO
%DQNV 
$5) 
056 
056 
&2 ' (  &2 ' ( 
&2 ' (  &2 ' ( 
1$2&73
152$3 
152$3 
%$ / 
%$ / 
%$ / 
%$  + 
1%2$3 
3RZH UXS 
9' ' DQ G&. VWD EOH 
/RDG
0R GH
5H JLVWH U
/RDG
([ W
0R GH 
5H JLVWH U
'R Q W&D UH
1. At first, device core power (V_DD) and device IO power (V_DDQ) must be brought up simultaneously. Typically V_DD and V_DDQ
are driven from a single power converter output.
Assert and hold CKE and DQM to a HIGH level.
2. After V_DD and V_DDQ are stable and CKE is HIGH, apply stable clocks.
3. Wait for 200µs while issuing NOP or DESELECT commands.
4. Issue a PRECHARGE ALL command, followed by NOP or DESELECT commands for at least t_RP period.
5. Issue two AUTO REFRESH commands, each followed by NOP or DESELECT commands for at least t_RFC period.
6. Issue two MODE REGISTER SET commands for programming the Mode Register and Extended Mode Register, each
followed by NOP or DESELECT commands for at least t_MRD period; the order in which both registers are programmed is
not important. Programming of the Extended Mode Register may be omitted when default values (half drive strength, 4 bank
refresh) will be used.
Following these steps, the Mobile-RAM is ready for normal operation.
Rev. 1.73, 2006-09
8
01302004-CZ2R-J9SE