HYB18L256160B Datasheet, PDF (43/58 Pages) Qimonda AG – DRAMs for Mobile Applications 256-Mbit Mobile-RAM

Data Sheet
2.4.10 POWER DOWN
Power-down is entered when CKE is registered LOW (no
accesses can be in progress). If power-down occurs when all
banks are idle, this mode is referred to as precharge power-
down; if power-down occurs when there is a row active in any
bank, this mode is referred to as active power-down. Entering
power-down deactivates the input and output buffers,
excluding CLK and CKE.
Power-down duration is limited by the refresh requirements of
the device (dddt_REF). CKE LOW must be maintained during
power-down.
The power-down state is synchronously exited when CKE is
registered HIGH (along with a NOP or DESELECT
command). One clock delay is required for power down entry
and exit.
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
FIGURE 45
Power Down Entry Command
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FIGURE 46
Power Down Entry and Exit
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Rev. 1.73, 2006-09
43
01302004-CZ2R-J9SE