HYB18L256160B Datasheet, PDF (15/58 Pages) Qimonda AG – DRAMs for Mobile Applications 256-Mbit Mobile-RAM

Data Sheet
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
FIGURE 5
Address / Command Inputs Timing Parameters
&/.
,Q SXW 
W_{&. }
W_{&+ }
W_{&/ }
9D OLG
W_{,6 } W_,_+
9D OLG
9D OLG
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'R Q W&D UH
Parameter
Clock cycle time
Clock frequency
Clock high-level width
Clock low-level width
Address and command input setup time
Address and command input hold time
CL = 3
CL = 2
CL = 3
CL = 2
Symbol
TABLE 9
Inputs Timing Parameters
- 7.5
Unit
Note
min.
max.
t_CK
7.5
—
9.5
—
ns
—
ns
f_CK
—
—
133
MHz
—
105
MHz
t_CH
2.5
—
t_CL
2.5
—
t_IS
1.5
—
t_IH
0.5
—
ns
—
ns
—
ns
—
ns
—
Rev. 1.73, 2006-09
15
01302004-CZ2R-J9SE