HYB18L256160B Datasheet, PDF (18/58 Pages) Qimonda AG – DRAMs for Mobile Applications 256-Mbit Mobile-RAM

Data Sheet
2.4.4
ACTIVE
Before any READ or WRITE commands can be issued to a
bank within the Mobile-RAM, a row in that bank must be
“opened” (activated). This is accomplished via the ACTIVE
command and addresses A0 - A12, BA0 and BA1 (see
Figure 9), which decode and select both the bank and the
row to be activated. After opening a row (issuing an ACTIVE
command), a READ or WRITE command may be issued to
that row, subject to the t_RCD specification. A subsequent
ACTIVE command to a different row in the same bank can
only be issued after the previous active row has been “closed”
(precharged).
The minimum time interval between successive ACTIVE
commands to the same bank is defined by t_RC. A subsequent
ACTIVE command to another bank can be issued while the
first bank is being accessed, which results in a reduction of
total row-access overhead. The minimum time interval
between successive ACTIVE commands to different banks is
defined by t_RRD.
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
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FIGURE 9
ACTIVE command
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FIGURE 10
Bank Activate Timings
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Parameter
Symbol
TABLE 11
Timing Parameters for ACTIVE Command
- 7.5
Units
Note
min.
max.
ACTIVE to ACTIVE command period
t_RC
67
—
ns
1)
ACTIVE to READ or WRITE delay
t_RCD
19
—
ns
1)
ACTIVE bank A to ACTIVE bank B delay t_RRD
15
—
ns
1)
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
Rev. 1.73, 2006-09
18
01302004-CZ2R-J9SE