HYB18L256160B Datasheet, PDF (51/58 Pages) Qimonda AG – DRAMs for Mobile Applications 256-Mbit Mobile-RAM

Data Sheet
3.3
Operating Currents
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
Parameter & Test Conditions
Symbol
TABLE 27
Maximum Operating Currents
Values for Values for
HY[B/E]... HYE...
160B[C/F] 160B[C/F]L
Unit Note¹⁾
- 7.5
- 7.5
Operating current:
I_DD1
60
60
one bank: active / read / precharge, BL = 1, t_RC = t_RCmin
Precharge power-down standby current:
all banks idle, CS ≥ V_IHmin, CKE ≤ V_ILmax,
inputs changing once every two clock cycles
I_DD2P
0.6
0.4
Precharge power-down standby current with clock stop:
I_DD2PS
0.5
all banks idle, CS ≥ V_IHmin, CKE ≤ V_ILmax, all inputs stable
Precharge non power-down standby current:
all banks idle, CS ≥ V_IHmin, CKE ≥ V_IHmin,
inputs changing once every two clock cycles
I_DD2N
13
0.35
13
Precharge non power-down standby current with clock stop: I_DD2NS
1.0
1.0
all banks idle, CS ≥ V_IHmin, CKE ≥ V_IHmin, all inputs stable
Active power-down standby current:
one bank active, CS ≥ V_IHmin, CKE ≤ V_ILmax,
inputs changing once every two clock cycles
I_DD3P
1.0
1.0
Active power-down standby current with clock stop:
I_DD3PS
0.75
0.5
one bank active, CS ≥ V_IHmin, CKE ≤ V_ILmax, all inputs stable
Active non power-down standby current:
one bank active, CS ≥ V_IHmin, CKE ≥ V_IHmin,
inputs changing once every two clock cycles
I_DD3N
15
15
Active non power-down standby current with clock stop:
I_DD3NS
1.5
1.5
one bank active, CS ≥ V_IHmin, CKE ≥ V_IHmin, all inputs stable
Operating burst read current:
all banks active; continuous burst read,
I_DD4
45
45
inputs changing once every two clock cycles
Auto-Refresh current:
t_RC = t_RCmin, “burst refresh”,
inputs changing once every two clock cycles
I_DD5
90
90
Self Refresh current:
I_DD6
self refresh mode, CS ≥ V_IHmin, CKE ≤ V_ILmax, all inputs stable
See Table 28
Deep Power Down current
I_DD7
20
20
1) 0 °C ≤ T_C ≤ 70 °C (comm.); -25 °C ≤ T_C ≤ 85 °C (ext.); V_DD = V_DDQ = 1.65V to 1.95V;
Recommended Operating Conditions unless otherwise noted
2) These values are measured with t_CK = 7.5 ns
3) All parameters are measured with no output loads.
mA
2)3)
mA ²⁾
mA –
mA ²⁾
mA –
mA ²⁾
mA –
mA ²⁾
mA –
mA
2)3)
mA ²⁾
–
µA –
Rev. 1.73, 2006-09
51
01302004-CZ2R-J9SE