MT9M114_16 Datasheet, PDF (9/62 Pages) ON Semiconductor – High-Definition (HD) System-On- A-Chip (SOC) Digital Image Sensor

MT9M114: 1/6-Inch 720p High-Definition (HD) System-On-A-Chip (SOC) Dig-
ital Image Sensor
Power-Up and Power-Down Sequence
Powering up and powering down the sensor requires voltages to be applied in a partic-
ular order, as seen in Figure 4. The timing requirements are shown in Table 4. The sensor
includes a power-on reset feature that initiates a reset upon power up of the sensor
Figure 4: Power-Up and Power-Down Sequence
V DD_IO
VDD, VDD_PHY
VAA, VDD_PLL
EXTCLK
S CLK
S DATA
t1
t2
t3
t4
t7
t6
t5
Table 4: Power-Up and Power-Down Signal Timing
Symbol Parameter
t1 Delay from VDD_IO to VDD and VDD_PHY
t2 Delay from VDD_IO to VAA and VDD_PLL
t3 EXTCLK activation
t4 First serial command^{1, 2}
t5 EXTCLK cutoff
t6 Delay from VAA and VDD_PLL to VDD_IO
t7 Delay from VDD and VDD_PHY toVDD_IO
Min Typ Max Unit
0
–
50 ms
0
–
50 ms
t2
–
– ms
–
44.5 – ms
t6
–
– ms
0
–
50 ms
0
–
50 ms
Notes: 1. Under the condition of EXTCLK=24MHz and default settings with CONFIG=1.
2. The host should poll the Command register to determine when the device is initialized.
MT9M114/D Rev. 11, 2/16 EN
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