MT9M114_16 Datasheet, PDF (16/62 Pages) ON Semiconductor – High-Definition (HD) System-On- A-Chip (SOC) Digital Image Sensor

MT9M114: 1/6-Inch 720p High-Definition (HD) System-On-A-Chip (SOC) Dig-
ital Image Sensor
Sensor Control
The sensor core of the MT9M114 is a progressive-scan sensor that generates a stream of
pixel data at a constant frame rate. Figure 9 shows a block diagram of the sensor core.
The timing and control circuitry sequences through the rows of the array, resetting and
then reading each row in turn. In the time interval between resetting a row and reading
that row, the pixels in the row integrate incident light. The exposure is controlled by
varying the time interval between reset and readout. Once a row has been selected, the
data from each column is sequenced through an analog signal chain, including offset
correction, gain adjustment, and ADC. The final stage of sensor core converts the output
of the ADC into 10-bit data for each pixel in the array.
The pixel array contains optically active and light-shielded (dark) pixels. The dark pixels
are used to provide data for the offset-correction algorithms (black level control).
The sensor core contains a set of control and status registers that can be used to control
many aspects of the sensor behavior including the frame size, exposure, and gain
setting. These registers are controlled by the MCU firmware and are also accessible by
the host processor through the two-wire serial interface.
The output from the sensor core is a Bayer pattern; alternate rows are a sequence of
either green and red pixels or blue and green pixels. The offset and gain stages of the
analog signal chain provide per-color control of the pixel data.
Figure 9: Sensor Core Block Diagram
Control Registers
System Control
Timing
and
Control
VGA
Active-Pixel
Sensor (APS)
Array
Green1/Green2
Channel
Red/Blue
Channel
Analog G1/G2
Processing ^R/B
ADC
G1/G2
R/B
Digital
10-Bit
Processing ^{Data Out}
Sensor Core
MT9M114/D Rev. 11, 2/16 EN
16
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