MT9M114_16 Datasheet, PDF (23/62 Pages) ON Semiconductor – High-Definition (HD) System-On- A-Chip (SOC) Digital Image Sensor

MT9M114: 1/6-Inch 720p High-Definition (HD) System-On-A-Chip (SOC) Dig-
ital Image Sensor
Binning and Summing
The MT9M114 sensor core supports binning and summing. Binning has many of the
same characteristics as subsampling but it gathers image data from all pixels in the
active window (rather than a subset of them).
Pixel binning will sample pixels and average the value together in the analog domain.
Summing will add the charge or voltage values of the neighboring pixels together. (e-
means "charge summing", v- means "voltage summing", and avg means "digital aver-
aging (post ADC). The advantage of using summing is that the pixel data is added
together and up to 4X increase in responsivity is achieved.
Figure 19: Pixel Binning and Summing
2 x2 Binning or Summing
Binning (x-Binning, y-Summing)
Summing (x/y-Summing)
avg
Σv
Σe^-
Σe^-
avg
Σ e^-
Σ e^-
Σv
Figure 20: Pixel Readout (Column and Row Binning)
X incrementing
MT9M114/D Rev. 11, 2/16 EN
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