MT9M114_16 Datasheet, PDF (57/62 Pages) ON Semiconductor – High-Definition (HD) System-On- A-Chip (SOC) Digital Image Sensor

MT9M114: 1/6-Inch 720p High-Definition (HD) System-On-A-Chip (SOC) Dig-
ital Image Sensor
Table 24:
Two-Wire Serial Interface Timing Data
f_{EXTCLK = 50 MHz; VDD = 1.8V; VDD_IO = 1.8V; VAA = 2.8V; TJ = 70°C; CLOAD = 68.5pF}
Symbol
Parameter
Conditions
Min
Typ
f_SCLK
t_SCLK
Serial interface input clock frequency
Serial interface input clock period
100
–
10
–
t_r
t_SRTS
t_SRTH
t_SDH
t_SDS
t_SHAW
t_AHSW
t_STPS
t_STPH
t_SHAR
t_AHSR
t_SDHR
t_SDSR
SCLK duty cycle
SCLK/SDATA rise time
Start setup time
Start hold time
SDATA hold
SDATA setup
SDATA hold to ack
Ack hold to SDATA
Stop setup time
Stop hold time
SDATA hold to ack
Ack hold to SDATA
SDATA hold
SDATA setup
45
50
–
–
Master write to slave
600
–
Master write to slave
300
–
Master write to slave
300
–
Master write to slave
300
–
Master write to slave
150
–
Master write to slave
150
–
Master write to slave
300
–
Master write to slave
600
–
Master read from slave
300
–
Master read from slave
300
–
Master read from slave
300
–
Master read from slave
350
–
Figure 37: Two-Wire Serial Bus Timing Parameters
Max
Unit
400
kHz
2.5
s
55
%
300
ns
–
–
ns
650
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
–
ns
650
ns
–
ns
Write Sequence
t_SRTS
SCLK
t_SCLK
t_SRTH
t_SDS
t_SDH
t_SHAW
t_AHSW
t_STPS
t_STPH
SDATA
Write Start
Write
Address
Bit 7
Read Sequence
SCLK
Write
Address
Bit 0
Register
Ack
Value
Bit 7
t_SHAR
t_AHSR
t_SDHR
t_SDSR
Register
Value
Ack
Stop
Bit 0
SDATA
Read Start
Read
Address
Bit 7
Read
Address
Bit 0
Register
Value
Ack
Bit 7
Register
Value
Bit 0
MT9M114/D Rev. 11, 2/16 EN
57
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