MC68HC05C8A Datasheet, PDF (99/158 Pages) Motorola, Inc – Microcontrollers

Operating Modes
Self-Check Mode
11.4 Self-Check Mode
Self-check mode is entered upon the rising edge of RESET if the IRQ pin
is at V_TST and the TCAP pin is at logic 1.
11.4.1 Self-Check Tests
The self-check read-only memory (ROM) at mask ROM location
$1F00–$1FEF determines if the MCU is functioning properly.These tests
are performed:
1. I/O — Functional test of ports A, B, and C
2. Random-access memory (RAM) — Counter test for each RAM
byte
3. Timer — Test of counter register and OCF bit
4. Serial communications interface (SCI) — Transmission test
checks for RDRF, TDRE, TC, and FE flags
5. Read-only memory (ROM) — Exclusive OR with odd ones parity
result
6. Serial peripheral interface (SPI) — Transmission test checks for
SPIF and WCOL flags
The self-check circuit is shown in Figure 11-2.
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A — Rev. 5.0
MOTOROLA
Operating Modes
Technical Data
99