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MC68HC05C8A Datasheet, PDF (154/158 Pages) Motorola, Inc – Microcontrollers
MC68HSC05C8A
B.8 2.4-V to 3.6-V High-Speed SPI Timing
The data in 13.12 3.3-V Serial Peripheral Interface Timing applies to
the MC68HSC05C8A with the exceptions given in the following table.
Num
Operating frequency
Master
Slave
Characteristic
Cycle time
1
Master
Slave
Enable lead time
2
Master
Slave
Enable lag time
3
Master
Slave
Clock (SCK) High Time
4
Master
Slave
Clock (SCK) low time
5
Master
Slave
Data setup time (Inputs)
6
Master
Slave
Data hold time (Inputs)
7
Master
Slave
8 Slave access time (time to data active from high-impedance state)
9 Slave disable time (hold time to high-impedance state)
Data
10
Master (before capture edge)
Slave (after enable edge)(2)
Data Hold Time (outputs)
11 Master (after capture edge)
Slave (after enable edge)
Rise time (20% VDD to 70% VDD, CL = 200 pF)
12
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
Fall time (70% VDD to 20% VDD, CL = 200 pF)
13
SPI outputs (SCK, MOSI, and MISO)
SPI inputs (SCK, MOSI, MISO, and SS)
1. Signal production depends on software.
2. Assumes 20 pF load on all SPI pins.
Symbol
fOP(M)
fOP(S)
tCYC(M)
tCYC(S)
tLead(M)
tLead(S)
tLag(M)
tLag(S)
tW(SCKH)M
tW(SCKH)S
tW(SCKL)M
tW(SCKL)S
tSU(M)
tSU(S)
tH(M)
tH(S)
tA
tDIS
tV(M)
tV(S)
tHO(M)
tHO(S)
tRM
tRS
tFM
tFS
Min
dc
dc
2.0
480
(1)
240
(1)
720
340
190
340
190
100
100
100
100
0
—
0.25
—
0.25
0
—
—
—
—
Max
0.5
2.1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
120
240
—
240
—
—
100
2.0
100
2.0
Unit
fOP
MHz
tCYC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCYC(M)
ns
tCYC(M)
ns
ns
µs
ns
µs
Technical Data
154
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A — Rev. 5.0
MC68HSC05C8A
MOTOROLA