MC68HC05C8A Datasheet, PDF (112/158 Pages) Motorola, Inc – Microcontrollers

Instruction Set
12.4.4 Bit Manipulation Instructions
The CPU can set or clear any writable bit in the first 256 bytes of
memory, which includes I/O registers and on-chip RAM locations. The
CPU can also test and branch based on the state of any bit in any of the
first 256 memory locations.
Table 12-4. Bit Manipulation Instructions
Instruction
Bit Clear
Branch if Bit Clear
Branch if Bit Set
Bit Set
Mnemonic
BCLR
BRCLR
BRSET
BSET
12.4.5 Control Instructions
These instructions act on CPU registers and control CPU operation
during program execution.
Table 12-5. Control Instructions
Instruction
Clear Carry Bit
Clear Interrupt Mask
No Operation
Reset Stack Pointer
Return from Interrupt
Return from Subroutine
Set Carry Bit
Set Interrupt Mask
Stop Oscillator and Enable IRQ Pin
Software Interrupt
Transfer Accumulator to Index Register
Transfer Index Register to Accumulator
Stop CPU Clock and Enable Interrupts
Mnemonic
CLC
CLI
NOP
RSP
RTI
RTS
SEC
SEI
STOP
SWI
TAX
TXA
WAIT
Technical Data
112
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A — Rev. 5.0
Instruction Set
MOTOROLA