MC68HC05C8A Datasheet, PDF (96/158 Pages) Motorola, Inc – Microcontrollers

Serial Peripheral Interface (SPI)
10.6.3 Serial Peripheral Data I/O Register
Address: $000C
Bit 7
6
5
4
3
2
1
Read:
SPD7
Write:
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
Reset
Unaffected by reset
Figure 10-6. SPI Data Register (SPSR)
Bit 0
SPD0
The serial peripheral data I/O register is used to transmit and receive
data on the serial bus. Only a write to this register will initiate
transmission/reception of another byte, and this will occur only in the
master device. At the completion of transmitting a byte of data, the SPIF
status bit is set in both the master and slave devices.
When the user reads the serial peripheral data I/O register, a buffer is
actually being read. The first SPIF must be cleared by the time a second
transfer of the data from the shift register to the read buffer is initiated or
an overrun condition will exist. In cases of overrun, the byte which
causes the overrun is lost.
A write to the serial peripheral data I/O register is not buffered and places
data directly into the shift register for transmission.
Technical Data
96
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A — Rev. 5.0
Serial Peripheral Interface (SPI)
MOTOROLA