MC68HC05C8A Datasheet, PDF (64/158 Pages) Motorola, Inc – Microcontrollers

Timer
After a read of the input capture register ($14) MSB, the counter transfer
is inhibited until the LSB ($15) is also read. This characteristic causes
the time used in the input capture software routine and its interaction with
the main program to determine the minimum pulse period.
A read of the input capture register LSB ($15) does not inhibit the free-
running counter transfer, since they occur on opposite edges of the
internal bus clock. Figure 8-3 shows the logic of the input capture
function.
TCMP
15
$0018
87
$0019
0
TIMER REGISTER HIGH
TIMER REGISTER LOW
EDGE
SELECT/DETECT
LOGIC
LATCH ¹⁵
87
0
INPUT CAPTURE REGISTER HIGH INPUT CAPTURE REGISTER LOW
$0014
$0015
TIMER
INTERRUPT
REQUEST
TIMER CONTROL REGISTER
$0012
TIMER STATUS REGISTER
$0013
Figure 8-3. Input Capture Operation
Technical Data
64
MC68HC05C8A • MC68HCL05C8A • MC68HSC05C8A — Rev. 5.0
Timer
MOTOROLA