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M37280MF Datasheet, PDF (79/178 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER    
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MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
12.11.4 Clock for OSD
As a clock for display to be used for OSD, it is possible to select one
of the following 3 types.
• Data slicer clock output from the data slicer (approximately 26 MHz)
• Clock from the LC oscillator supplied from the pins OSC1 and OSC2
• Clock from the ceramic resonator or the quartz-crystal oscillator
from the pins OSC1 and OSC2
The clock for display to be used for OSD can be selected by bit 7 of
port P3 direction register, bit 2 and bit 1 of clock source control reg-
ister (address 021616). If the pins OSC1 and OSC2 are not used as
OSD clock input/output, these pins can be used as the sub-clock
input/output, or port P6.
Table 12.11.2 Setting of P63/OSC1/XCIN, P64/OSC2/XCOUT
Function Clock input/
Registers
output pins
for OSD
Sub-clock
input/
output pins
Input port
Bit 7 of Port P3
0
0
1
Direction Register
Clock Control Bit 2 1
1
0
0
Register
Bit 1 0
1
0
1
Clock Control Register
b7 b6 b5 b4 b3 b2 b1 b0
000 0
Clock control register (CS) [Address 021616]
B
Name
Functions
After reset R W
0 Clock selection bit
(CS0)
0: Data slicer clock
1: OSC1 clock
0 RW
1, 2 OSC1 oscillating mode b2 b1
0
selection bits (CS1, CS2) 0 0: 32kHz oscillating mode.
0 1: Used as input port of P63
and P64 (See note 1).
1 0: LC oscillating mode
1 1: Ceramic • quartz-crystal
oscillating mode
RW
3 to 6 Fix these bits to “0.”
7 Test bit
(See note 2)
0 RW
0 RW
Note 1: Set bit 7 of address 00C716 to “1”, when OSC1 and OSC2 are used as P63
and P64.
2: Be sure to set bit 7 to “0” for program of the mask and the EPROM versions.
For the emulator MCU version (M37280ERSS), be sure to set bit 7 to “1”
when using the data slicer clock for software debugging.
Fig. 12.11.16 Clock Control Register
Rev. 1.0
79