M37280MF Datasheet, PDF (16/178 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

PRELIMINARY _{NSootimcee: pTahriasmisennotitcalimfinitasl} ^{asrpeecsiufibcjaetciot nto. change.}
MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
s SFR1 area (addresses E016 to FF16)
Bit allocation
State immediately after reset
:
: Name
Function bit
0 : “0” immediately after reset
1 : “1” immediately after reset
: No function bit
0 ^{: Fix to this bit to “0”}
(do not write to “1”)
? ^{: Indeterminate immediately}
after reset
1 ^{: Fix to this bit to “1”}
(do not write to “0”)
Address _Register
E016 Data slicer control register 1 (DSC1)
E116 Data slicer control register 2 (DSC2)
E216 Caption data register 1 (CD1)
E316 Caption data register 2 (CD2)
E416
E516
E616
E716
E816
E916
Caption data register 3 (CD3)
Caption data register 4 (CD4)
Caption Position register (CPS)
Data slicer test register 2
Data slicer test register 1
Sync signal counter register (HC)
EA16 Clock run-in detect register (CRD)
EB16 Data clock position register (DPS)
EC16
ED16 Bank control register (BK)
EE16 _{A-D conversion register (AD)}
EF16 _{A-D control register (ADCON)}
F016 Timer 1 (T1)
F116 Timer 2 (T2)
F216 _{Timer 3 (T3)}
F316 Timer 4 (T4)
F416
F516
F616
F716
F816
Timer mode register 1 (TM1)
Timer mode register 2 (TM2)
I²C data shift register (S0)
I²C address register (S0D)
I²C status register (S1)
F916 _I²_{C control register (S1D)}
FA16 I²C clock control register (S2)
FB16
FC16
FD16
FE16
FF16
CPU mode register (CM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Bit allocation
State immediately after reset
b7
b0 b7
b0
0 0 0 0 0 ^{DSC12 DSC11 DSC10}
0016
0 ^{DSC25 DSC24 DSC23}
0 ^DSC20 ? 0 ? 0 ? ? 0 ?
CDL17 CDL16 CDL15 CDL14 CDL13 CDL12 CDL11 CDL10
0016
CDH17 CDH16 CDH15 CDH14 CDH13 CDH12 CDH11 CDH10
0016
CDL27 CDL26 CDL25 CDL24 CDL23 CDL22 CDL21 CDL20
0016
CDH27 CDH26 CDH25 CDH24 CDH23 CDH22 CDH21 CDH20
0016
CPS7 CPS6 CPS5 CPS4 CPS3 CPS2 CPS1 CPS0 _{0 0 ? 0 0 0 0 0}
0016
0016
0016
0016
HC5 HC4 HC3 HC2 HC1 HC0 0 0 ? ? ? ? ? ?
CRD7 CRD6 CRD5 CRD4 CRD3
0016
0 ^{DPS7 DPS6 DPS5 DPS4 DPS3} 0 1
0916
BK7 BK6 0 0 BK3 BK2 BK1 BK0
?
0016
?
0
0 ^{ADVREF ADSTR ADIN2 ADIN1 ADIN0} 0 ? 0 0 1 0 0 0
FF16
0716
FF16
0716
TM17 TM16 TM15 TM14 TM13 TM12 TM11 TM10
0016
TM27 TM26 TM25 TM24 TM23 TM22 TM21 TM20
0016
D7 D6 D5 D4 D3 D2 D1 D0
SAD6 SAD5 SAD4 SAD3 SAD2 SAD1 SAD0 RBW
?
0016
MST TRX BB PIN AL AAS AD0 LRB _{0 0 0 1 0 0 0 ?}
BSEL1
BSEL0
10BIT
SAD
ALS ESO BC2
BC1 BC0
0016
ACK
ACK
BIT
FAST
MODE
CCR4
CCR3
CCR2
CCR1
CCR0
0016
CM7 CM6 CM5 1 1 CM2 _{0 0}
3C16
ADR VSCR ^OSDR TM4R TM3R TM2R TM1R
0 ^TM56R IICR INC2KR0 CKR SIOR DSR IN1R
ADE VSCE ^OSDE TM4E TM3E TM2E TM1E
0016
0016
0016
TM56S TM56E _{IICE IN2E CKE SIOE DSE IN1E}
0016
Fig. 12.2.4 Memory Map of Special Function Register 1 (SFR2) (2)
16
Rev. 1.0