M37280MF Datasheet, PDF (55/178 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

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MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
12.10 DATA SLICER
This microcomputer includes the data slicer function for the closed
caption decoder (referred to as the CCD). This function takes out the
caption data superimposed in the vertical blanking interval of a com-
posite video signal. A composite video signal which makes the sync
chip’s polarity negative is input to the CVIN pin.
When the data slicer function is not used, the data slicer circuit and
the timing signal generating circuit can be cut off by setting bit 0 of
the data slicer control register 1 (address 00E016) to “0.” These set-
tings can realize the low-power dissipation.
Composite
video
signal
0.1 µF _470Ω
1 MΩ
560 pF _{1 µF}
CVIN
HSYNC
1 kΩ
200 pF
HLF
Clamping
circuit
Low-pass
filter
Sync slice
circuit
VHOLD
1000 pF
Reference
voltage
generating
circuit
+
–
Comparator
Synchronizing
signal counter
Synchronizing
separation
circuit
Timing signal
generating
circuit
Clock run-in
determination
circuit
Data slice line
specification
circuit
Sync pulse counter
register
(address 00E916)
Data slicer control register 2
(address 00E116)
Data slicer control register 1
(address 00E016)
Data slicer ON/OFF
Clock run-in defect register
(address 00EA16)
External circuit
Note : Make the length of wiring which is connected
to VHOLD, HLF, and CVIN pin as short as
possible so that a leakage current may not
be generated when mounting a resistor or a
capacitor on each pin.
Caption data register 2
(address 00E316)
Start bit detecting
circuit
Data clock
generating circuit
16-bit shift register
high-order
low-order
Caption position register
(address 00E616)
Data clock position register
(address 00EB16)
Interrupt request
generating circuit
Data slicer
interrupt
request
Caption data register 1
(address 00E216)
Caption data register 4
(address 00E516)
Data bus
Caption data register 3
(address 00E416)
Fig. 12.10.1 Data Slicer Block Diagram
Rev. 1.0
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