M37280MF Datasheet, PDF (52/178 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

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MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
12.8.6 Conversion Method
ΠSet bit 7 of the interrupt input polarity register (address 021216) to
“1” to generate an interrupt request at completion of A-D conver-
sion.
 Set the A-D conversion · INT3 interrupt request bit to “0” (even
when A-D conversion is started, the A-D conversion · INT3 inter-
rupt reguest bit is not set to “0” automatically).
Ž When using A-D conversion interrupt, enable interrupts by setting
A-D conversion · INT3 interrupt request bit to “1” and setting the
interrupt disable flag to “0.”
 Set the VCC connection selection bit to “1” to connect VCC to the
resistor ladder.
 Select analog input pins by the analog input selection bit of the A-
D control register.
‘ Set the A-D conversion completion bit to “0.” This write operation
starts the A-D conversion. Do not read the A-D conversion register
during the A-D conversion.
’ Verify the completion of the conversion by the state (“1”) of the
A-D conversion completion bit, the state (“1”) of A-D conversion ·
INT3 interrupt reguest bit, or the occurrence of an A-D conversion
interrupt.
“ Read the A-D conversion register to obtain the conversion results.
Note : When the ladder resistor is disconnect from VCC, set the VCC connec-
tion selection bit to “0” between steps ’ and “.
12.8.7 Internal Operation
When the A-D conversion starts, the following operations are auto-
matically performed.
Œ The A-D conversion register is set to “0016.”
 The most significant bit of the A-D conversion register becomes
“1, ” and the comparison voltage “Vref” is input to the comparator.
At this point, Vref is compared with the analog input voltage “VIN .”
Ž Bit 7 is determined by the comparison results as follows.
When Vref < VIN : bit 7 holds “1”
When Vref > VIN : bit 7 becomes “0”
With the above operations, the analog value is converted into a digi-
tal value. The A-D conversion terminates in a maximum of 50 ma-
chine cycles (12.5 µs at f(XIN) = 8 MHz) after it starts, and the con-
version result is stored in the A-D conversion register.
An A-D conversion interrupt request occurs at the same time as A-D
conversion completion, the A-D conversion · INT3 interrupt request
bit becomes “1.” The A-D conversion completion bit also becomes
“1.”
Table 12.8.1 Expression for Vref and VREF
A-D conversion register contents “n”
(decimal notation)
0
1 to 255
Note: VREF indicates the reference voltage (= Vcc).
Vref (V)
0
VREF _{~(n |0.5)}
256
Contents of A-D conversion register
A-D conversion start
00 0 00 000
1st comparison start
2nd comparison start
3rd comparison start
10000 00 0
1 1000 00 0
12 100 00 0
8th comparison start
12 3 45 6 7 1
Reference voltage (Vref) [V]
0
VREF
2
–
VREF
512
VREF
2
±
VREF
4
–
VREF
512
VREF _±
2
VREF _±
4
VREF
8
–
VREF
512
VREF
2
±
VREF
4
±
VREF
8
±
.....
.......
±
VREF _–
256
VREF
512
A-D conversion completion
(8th comparison completion)
12 3 456 78
Digital value corresponding to
analog input voltage.
m : Value determined by mth (m = 1 to 8) result
Fig. 12.8.3 Changes in A-D Conversion Register and Comparison Voltage during A-D Conversion
52
Rev. 1.0