M37280MF Datasheet, PDF (75/178 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

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MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
The display position in the vertical direction is determined by count-
ing the horizontal sync signal (HSYNC). At this time, when VSYNC and
HSYNC are positive polarity (negative polarity), it starts to count the
rising edge (falling edge) of HSYNC signal from after fixed cycle of
rising edge (falling edge) of VSYNC signal. So interval from rising edge
(falling edge) of VSYNC signal to rising edge (falling edge) of HSYNC
signal needs enough time (2 machine cycles or more) for avoiding
jitter. The polarity of HSYNC and VSYNC signals can select with the
I/O polarity control register (address 021716).
8 machine cycles or more
VSYNC signal input
VSYNC control
signal in
microcomputer
Period of counting
HSYNC signal
HSYNC
signal input
8 machine cycles
or more
0.25 to 0.50 [µs]
( at f(XIN) = 8MHz)
(Note 2)
12345
Not count
When bits 0 and 1 of the I/O polarity control register
(address 021716) are set to “1” (negative polarity)
Notes 1 : The vertical position is determined by counting falling edge of
HSYNC signal after rising edge of VSYNC control signal in the
microcomputer.
2 : Do not generate falling edge of HSYNC signal near rising edge
of VSYNC control signal in microcomputer to avoid jitter.
3 : The pulse width of VSYNC and HSYNC needs 8 machine cycles
or more.
Fig. 12.11.9 Supplement Explanation for Display Position
Rev. 1.0
75