M37280MF Datasheet, PDF (54/178 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

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MITSUBISHI MICROCOMPUTERS
M37280MF–XXXSP, M37280MK–XXXSP
M37280EKSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
12.9 ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses (2 blocks)
can be corrected, a program for correction is stored in the ROM cor-
rection memory in RAM. The ROM memory for correction is 32 bytes
! 2 blocks.
Block 1 : addresses 02C016 to 02DF16
Block 2 : addresses 02E016 to 02FF16
Set the address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction address, the main pro-
gram branches to the correction program stored in the ROM memory
for correction. To return from the correction program to the main pro-
gram, the op code and operand of the JMP instruction (total of 3
bytes) are necessary at the end of the correction program. When the
blocks 1 and 2 are used in series, the above instruction is not needed
at the end of the block 1.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1: S p e c i f y t h e f i r s t a d d r e s s ( o p c o d e a d d r e s s ) o f e a c h
instruction as the ROM correction address.
2: Use the JMP instruction (total of 3 bytes) to return from
the correction program to the main program.
3: Do not set the same ROM correction address to blocks 1
and 2.
4: For the M37280MK-XXXSP and M37280EKSP, when using the ex-
pansion ROM (BK7 = “1”), the ROM correction function do not oper-
ate used for addresses 100016 to1FFF16. Note that on programming.
ROM correction address 1 (high-order) 020C16
ROM correction address 1 (low-order) 020D16
ROM correction address 2 (high-order) 020E16
ROM correction address 2 (low-order) 020F16
Fig. 12.9.1 ROM Correction Address Registers
ROM Correction Enable Register
b7 b6 b5 b4 b3 b2 b1 b0
00
ROM correction enable register (RCR) [Address 021016]
B
Name
0 Block 1 enable bit (RCR0)
1 Block 2 enable bit (RCR1)
2, 3 Fix these bits to “0.”
Functions
0: Disabled
1: Enabled
0: Disabled
1: Enabled
After reset R W
0 _RW
0 _RW
0 _RW
4 Nothing is assigned. These bits are write disable bits. When
to these bits are read out, the values are “0.”
7
0 _R—
Fig. 12.9.2 ROM Correction Enable Register
54
Rev. 1.0