PIC18F4550-IP Datasheet, PDF (392/438 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
FIGURE 28-7:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
Oscillator
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
I/O pins
Note: Refer to Figure 28-4 for load conditions.
30
31
34
34
FIGURE 28-8:
BROWN-OUT RESET TIMING
VDD
VIRVST
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
BVDD
35
36
VBGAP = 1.2V
TABLE 28-12: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Typ Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
—
—
μs
31
TWDT Watchdog Timer Time-out Period
3.5
4.1
4.8
ms
(no postscaler)
32
TOST Oscillator Start-up Timer Period 1024 TOSC — 1024 TOSC — TOSC = OSC1 period
33
TPWRT Power-up Timer Period
57.0 65.5 77.1
ms
34
TIOZ I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
—
2
—
μs
35
TBOR Brown-out Reset Pulse Width
200
—
—
μs VDD ≤ BVDD (see D005)
36
TIRVST Time for Internal Reference
Voltage to become Stable
—
20
50
μs
37
TLVD Low-Voltage Detect Pulse Width
200
—
—
μs VDD ≤ VLVD
38
TCSD CPU Start-up Time
5
—
10
μs
39
TIOBST Time for INTOSC to Stabilize
—
1
—
ms
DS39632E-page 390
© 2009 Microchip Technology Inc.