PIC18F4550-IP Datasheet, PDF (14/438 Pages) Microchip Technology – 28/40/44-Pin, High-Performance, Enhanced Flash, USB Microcontrollers with nanoWatt Technology

PIC18F2455/2550/4455/4550
TABLE 1-2: PIC18F2455/2550 PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Number _Pin
PDIP, ^Type
SOIC
Buffer
Type
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
1
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
I
ST
Digital input.
OSC1/CLKI
OSC1
CLKI
9
Oscillator crystal or external clock input.
I Analog Oscillator crystal input or external clock source input.
I Analog External clock source input. Always associated with pin
function OSC1. (See OSC2/CLKO pin.)
OSC2/CLKO/RA6
OSC2
CLKO
RA6
10
Oscillator crystal or clock output.
O
—
Oscillator crystal output. Connects to crystal or resonator in
Crystal Oscillator mode.
O
—
In select modes, OSC2 pin outputs CLKO which has 1/4 the
frequency of OSC1 and denotes the instruction cycle rate.
I/O TTL
General purpose I/O pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.
2: Default assignment for CCP2 when CCP2MX Configuration bit is set.
DS39632E-page 12
© 2009 Microchip Technology Inc.